The configuration is an all-band direct transmitter using PSN. I have made all-band PSN transmitters (MT-Pluto/TX-Neptune) using W conversion, but I have not yet made a direct all-band PSN transmitter, so I decided to give it a try. In addition, I will add an ACN (auto carrier null) function to improve stability. Although I started designing it for all bands, there have been no QSOs on 21M/28M for over 10 years, so these are unused bands, so I will narrow it down to the 3.5M/7M/14M bands.

【specification】
　　　　　　　　　　①　Direct all-band PSN transmitter. (changeable to 3.5M/7M/14M)
　　　　　　　　　　②　The opposite sideband adjustment values ​​(Phase/Balance) of each band are memorized.
　　　　　　　　　　③　ACN (Auto Carrier Null) detection is generated at 455KHz.
　　　　　　　　　　④　Output = Maximum 250mW.
　　　　　　　　　　⑤　LPF = Active and SCF switching method.
　　　　　　　　　　⑥　HPF = 8 position switching: 33Hz/48/70/85/100/125/150/185Hz.
　　　　　　　　　　⑦　Mode = LSB/USB/ISB


【Key features of the all-band direct transmitter】
　①　In the case of single conversion/double conversion, the SSB generator can be configured with a fixed carrier for any band frequency (for example, 455KHz or 128KHz). Therefore, since the carrier of the SSB generator is fixed and does not move, it is easy to generate an I/Q carrier for use in the PSN modulator, and the RF-PSN mechanism is also simple. However, when it comes to all-band direct, the frequency changes even within the same band, and a stable I/Q signal carrier is required.
　②　To achieve ①, you can easily generate fixed carrier I/Q of 128KHz or 455KHz by oscillating four times and generating I/Q with the 1/4 method, and fine-tuning the RF phase (RF-PSN) with VR. This is easy because it is a fixed carrier, but it is not easy when the frequency is high and variable. For example, at 455KHz, the phase is 90 degrees, and the time axis is 550nS, but at 3.5MHz it is 71nS, and at 14MHz it is 17nS, so the value changes depending on the frequency. The smaller the absolute value of the time axis of this 90-degree phase, the more critical the reverse side characteristics become. For example, for a 1nS fluctuation, the phase fluctuation is 90/550=0.16 degrees at 455KHz, 90/71=1.27 degrees at 3.5MHz, and 90/17=5.3 degrees at 14MHz, so analog adjustment using VR is not possible directly. Naturally, carrier generation using the 4x method is also not possible. It is also necessary to secure an RF phase adjustment value for each band. RF phase adjustment with a fixed carrier is performed using the method shown in the figure below, but with analog adjustment using a fixed delay like this, although the delay value does not change when the frequency changes, the amount of phase shift changes as a result, so this method cannot be used.

　　　　　　　　　　　　　

　③　Therefore, the RF signal (I/Q signal) for direct modulation needs to be digitally adjusted with millidegree resolution, and the phase value, not the time axis delay, needs to be adjusted. Because it is phase value control, the phase remains constant even if the frequency changes. However, it is necessary to ensure that different phase adjustment values ​​can be secured for each band. This is because when the band changes in the modulation circuit (the amount of change in frequency becomes large), the optimal adjustment value changes due to individual differences.
　④　Considering the above conditions, we have considered various DDS circuits and decided to try to adopt a new DDS that is close to the best. The DDS used in the direct receiver had a 200MHz clock and a tuning word of 48 bits, so it is generally said that divisible bits are discarded and errors occur, but since it is 48 bits, it ensures more than 12th power. In other words, since it is locked to a reference clock, there is almost no difference from the reference accuracy if a reference clock such as GPS/Rubym is used. However, since the DAC was 12 bits, this time we will use a low-power DDS with a DAC of 14 bits, a 400MHz clock, and a 1.8V drive. However, there is one difficulty. Although the package is small with a 48-pin QFP, the pin pitch is Ultra SSOP (0.5 mm), while the QFP 80-pin used up until now was SSOP (0.65 mm). Hand soldering of a higher density package than SSOP has not yet been done.
　⑤　Regarding the reverse sideband adjustment, the frequency change is about 200KHz within the band, but the change is doubled between other bands, so the RFPSN adjustment value and the AFPSN U-row/L-row balance value can be adjusted independently for each band due to the difference caused by individual differences, and these adjustment values ​​are stored.
　⑥　To achieve ACN (Auto Carrier Null), the frequency changes, so it is not possible to detect the carrier at the current frequency each time. The devices we have made so far have been able to detect the carrier at the IF point with double conversion, but in direct, a mixer is set up specifically for carrier detection, and this unit detects at 455KHz. This circuit does not pass through as a transmission signal route, so it does not affect the signal quality.


　　　　　　　　　

　　　　　　　　　　　　　　　　　　　　　　　operation manual

　　　　　　　　　　　　　　　　　　　　　　　Adjustment and Check Methods

　　　　

【DDS-Unit】

　　　　　　　　

The master clock frequency is 26MHz and is locked to an external reference clock (10KHz), and all clocks are generated from this master clock. The I/Q carrier for direct PSN modulation uses AD9951 (14bit-DAC) DDS, and the phase difference between IQ can be controlled in phase units as an RF-PSN function. The carrier supplied to the mixer for carrier detection as ACN uses AD9851 (10bit-DAC), which always outputs a carrier of transmission frequency +455KHz. The SCF clock uses a 100x clock SCF (MAX294), so when cutoff = 3.0KHz, a 300KHz clock is supplied. The 26MHz is divided by a BCD programmable divider, allowing the cutoff to be set in 100Hz steps. The comparator that locks the master clock (26MHz) to the external 10KHz uses 74HC86 (X-OR), and supplies 10KHz from 26MHz with a duty of 50%. When the external 10KHz is not input, the comparator output is 10KHz with a duty of 50%. The control voltage for the 26MHz VCXO is 1/2Vcc, so the frequency deviation can be kept very small.
　　　　　　　　　　　　DDS board and each signal output　　　　　　DDS modification file

【Display unit】

　The components to be mounted on the component side are the tact key/LCD/LED/encoder, two diodes, and two capacitors (223). Everything else is mounted on the solder side. The LCD is not raised off the board, but rather the metal fittings are in contact with the board, and the 14-pin hole is connected using the resistor legs. When mounting components on the solder side, it is necessary to check (IC direction, etc.) especially the components located under the LCD.

　　　Dynamic inspection (including CPU unit)
　　　①　Supply a single +5V power supply by setting CNP1 pin ① to +5V and pin ③ to GND.
　　　②　Current consumption = about 60mA. If it deviates too much, it's no good.
　　　③　Turn VR1 (502) to adjust the contrast of the LCD display so that the white text can be clearly seen as in the photo below.

　　　Board unit completed　　　　　Panel unit completed　　　　CPU Unit　

　　　　Sticker for attaching meter dial　ELECOM　Photo sticker EDT-PS4 (Your search number = L11)

【MAIN UNIT】

　The audio block is the same as before, and only the LPF is implemented with two types, Active and SCF, which can be switched from the panel. The rose modulus is a switch type, but because the frequency is high, a bus switch with small propagation delay is used to reduce the drift effect. If the dynamic range of the ACN is widened, the carrier null circuit does not need to be pre-adjusted, but the resolution of the ACN becomes coarse. Considering the resolution and range, the ACN is preset to the center value for each band and each mode (LSB/USB). After that, there are no major changes from the previous series. Since the ACN carrier detection is direct, it is not possible to detect the carrier each time, so a mixer is installed exclusively for ACN detection, and the carrier detection is performed by two-stage amplification detection so that the same frequency (455KHz) is always obtained.
　　　　
The AFPSN unit is installed on the component side, and the HPF and ActiveLPF units are installed on the solder side, creating a three-stage configuration.
                              

MIN modification file
　　　　　　　　　　　　　　　　　　　　　　　　　　　

【Each unit】

【AFPSN Unit】

　I forgot to mention something important. The four input resistors (R17/R42/R67/R92 = 103) of the AFPSN unit are necessary when adjusting the unit alone, but when mounting, all four must be cut. It is better to cut the legs rather than removing them. (Reinstall them when adjusting again)
I put together an 8-stage all-pass amplifier, took out my homemade phase meter and 3DDS for the first time in a while, and adjusted each pole. After adjusting, I input a 50Hz to 4KHz sweep signal (output from the 3DDS) and confirmed the in-band phase imbalance of the all-pass U-row output and L-row output.
　　　　　　　AFPSN unit, for ISB compatibility
　　　　　　　　Equipped with two lines: LSB and USB        　　　

Full scale = ±0.1 degrees, within the green belt = ±0.02 degrees
In other words, the opposite side should be at least 75 dB.
　　　　　　　　　　　　　　　　　　　　　　In-band phase difference animation　　


【LPF/HPF unit】
The HPF (high pass filter) and LPF (low pass filter) follow the types that have been designed and used so far. The HPF is a 4th order filter that can be switched between 8 positions (33Hz/48Hz/70Hz/85Hz/100Hz/125Hz/185Hz/230Hz), and the LPF can be switched between two types, active and switched capacitor, and the active is an 8th order Chebyshev that supports 4 positions (2.7KHz/3.0KHz/3.5KHz/4.0KHz). The switched capacitor can be used in either 1-stage or 2-stage, and can be set in 100Hz steps from 1.4KHz to 4.0KHz. In addition, these units use low header pins because they are installed from the solder side when mounting the main board.
　
　　　　　　　　　　　　　　　　　　　　　Each unit　
HPF measurement results　　Actual measurement results of LPF (Active)　
Actual measurement results of LPF (SCF)